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SystemVerilog Assertions and Functional Coverage: Guide to Language, Methodology and Applications
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SystemVerilog Assertions and Functional Coverage: Guide to Language, Methodology and Applications

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PublisherSpringer
ISBN 101461473233
Book DescriptionThis book provides a hands-on, application-oriented guide to the language and methodology of both SystemVerilog Assertions and SytemVerilog Functional Coverage.  Readers will benefit from the step-by-step approach to functional hardware verification,
Book FormatHardcover
Publication Date2013-08-06
ISBN 139781461473237
About the AuthorAshok Mehta is a senior manager in TSMC's CPU/SoC Architecture and Methodology group working on System and 3DIC design projects. In the past, Ashok worked in engineering and management positions at DEC, Data General, Intel and AMCC. He has extensive experience in Design/Verification of complex SoC and Processor devices. He holds nine US patents on ESL and 3DIC designs. Ashok holds a MSEE from University of Missouri.
AuthorAshok B. Mehta
LanguageEnglish
Number of Pages389 pages
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SystemVerilog Assertions and Functional Coverage: Guide to Language, Methodology and Applications
SystemVerilog Assertions and Functional Coverage: Guide to Language, Methodology and Applications
Sorry! This product is not available.
Available Soon

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